The initial cost of TSMC’s 3nm process is staggering, and it is estimated that it will need to ship more than 300 million chips before starting to make a profit

TSMC’s 3nm process started risk trial production last year, and is currently in mass production as planned in the second half of the year. According to foreign media reports, the trial production of TSMC’s 3nm process is progressing smoothly, and the monthly production capacity in the initial stage of mass production is expected to exceed 25,000 wafers.

TSMC’s 3nm process will be produced in the Hsinchu Science Park and Tainan Science Park factories. The initial monthly production capacity of the 3nm process in the Hsinchu Science Park is expected to be 10,000-20,000 wafers, and the Tainan Science Park is expected to be 15,000 wafers, with a total monthly production capacity. At 25,000-35,000 wafers.

Although there were reports last year that TSMC’s 3-nanometer process was “stuck”, TSMC responded at that time and reiterated that the 3-nanometer process was proceeding as planned.

The 3nm process is mass-produced in Hsinchu Science Park and Tainan Science Park, which means that TSMC has built 3nm process production lines in these two parks. In addition, the 3nm process requires a lot of extreme ultraviolet exposure machines and other advanced equipment, so the investment of the factory will be quite large. Coupled with the investment in the long R&D process, the input of various raw materials during mass production, and the consumption of electricity, TSMC’s manufacturing process will take some time to be profitable.

The 3nm process is faced with the problems of high chip design complexity and soaring wafer foundry costs. Moreover, due to the high procurement cost of EUV exposure machines and the slowdown in throughput improvement, the 3nm foundry quotations may reach as high as Nearly $30,000.

In addition, the cost in terms of power consumption is also quite high. The EUV machine is transmitted through a special mirror, and the power consumption is more than 10 times that of the deep ultraviolet lithography (DUV) machine to achieve the last remaining 2% of the light energy for exposure. The EUV light pulse energy is optimized, and the reflection structure is redesigned to effectively increase the reflectivity by 3%.

Regarding the profitability of TSMC’s 3nm process, some foreign media estimated in reports that TSMC’s process will need to be profitable after at least 300 million chips have been shipped.

Considering that TSMC has a huge customer base, only the major customer Apple’s A-series processors, the annual demand in recent years has exceeded 200 million, and the shipments of their 3nm process foundry chips are expected to soon increase. It will exceed 300 million and achieve profit.

For customers of the 3nm process, TSMC CEO Wei Zhejia revealed in the earnings analyst conference call in the first quarter of this year that they continue to see high-level customers are interested in their process, and it is expected that the first year of production after mass production will start filming. The amount will be higher than the same period of the 7nm and 5nm processes.

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